OEVT (USB3_XHCI) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

OEVT (USB3_XHCI) Register Description

Register NameOEVT
Offset Address0x000000CC08
Absolute Address 0x00FE20CC08 (USB3_0_XHCI)
0x00FE30CC08 (USB3_1_XHCI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionOTG Events Register
Any event set in this register will cause otg_interrupt signal to go high. Writing 1b1 to the event information bit in this register clears the register bit and the associated interrupt. The otg_interrupt signal goes low when there are no more pending OTG events.

OEVT (USB3_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DeviceMode31roRead-only0Device Mode
Indicates whether the device is in A-device or B-device mode based on utmiotg_iddig
- 1b0: A-Device mode
- 1b1: B-Device mode
The rest of the OTG Event Information bits (OTGxxxxEvtInfo) in OEVT register is based on the contents of this field.
Reserved30:28roRead-only0x0Reserved
OTGXhciRunStpSetEvnt27wtcReadable, write a 1 to clear0x0OTG Host Run Stop Set Event
This event is set when the Host Driver programs the USBCMD.Run/Stop to 1b1.
Note:
- During Hibernation Exit, upon receiving this event, the OTG Driver can start register accesses to the core.
- This bit is applicable for OTG 2.0 and OTG 3.0 modes of operation.
OTGDevRunStpSetEvnt26wtcReadable, write a 1 to clear0x0OTG Device Run Stop Set Event
This event is set when the Device Driver programs the DCTL.Run/Stop to 1b1.
Note: During Hibernation Exit, upon receiving this event, the OTG Driver can start register accesses to the core.
OTGHibEntryEvnt25wtcReadable, write a 1 to clear0x0OTG Hibernation Entry Event:
- A-Device mode: This event is set when there is hibernation save request from the Host Driver by programming USBCMD.CSS bit to 1 when USBCMD.RunStp is 0.
- B-Device mode: This event is set when there the Device Driver by programming DCTL.RunStp bit to 0.
When this event is generated, the OTG Driver must disable all register accesses to the core.
OTGConIDStsChngEvnt24wtcReadable, write a 1 to clear0x0Connector ID Status Change Event
Set in both A-Dev/B-Dev Mode. This event is generated when there is a change in connector ID status.
When this bit is set, OEVT.OTGConIDStsChngEvnt is enabled. If not, the event is disabled.
HRRConfNotifEvnt23wtcReadable, write a 1 to clear0x0Host Role Request Confirm Notifier Event
The core sets this bit after receiving a Host Role Request Device Notification TP with Confirm field set while operating as either an A-host or a B-host.
Note:
- This bit is applicable only when operating in SS mode.
- This bit is applicable only for OTG 3.0 mode of operation.
HRRInitNotifEvnt22wtcReadable, write a 1 to clear0x0Host Role Request Initiate Notifier Event
The core sets this bit after receiving a Host Role Request Device Notification TP with Initiate field set while operating as either an A-host or a B-host.
OTGADevIdleEvnt21wtcReadable, write a 1 to clear0A-device A-IDLE Event
Set in A-device Mode Only.
The event is generated when A-device enters A-IDLE state. This event is set when the OTG 2.0 FSM of the core enters A-IDLE state from any other OTG state.
A-device A-IDLE Event
When this bit is set, OEVT.OTGADevIdleEvnt is enabled. If not, the event is disabled.
OTGADevBHostEndEvnt20wtcReadable, write a 1 to clear0x0A-device B-Host End Event
Set in A-device Mode Only. The event is generated when B-device has completed its host role.
Note: This bit is applicable for OTG 2.0 and OTG 3.0 modes of operation.
When this bit is set, OEVT.OTGADevBHostEndEvnt is enabled. If not, the event is disabled.
OTGADevHostEvnt19wtcReadable, write a 1 to clear0x0A-device host event
Set in A-device Mode Only. This event is generated when A-device enters host role.
In HS/FS mode, it occurs after the initial connect to a B-device as A-host as well as when there is a role change from A-peripheral to A-host.
Note: This bit is applicable only for OTG 2.0 mode of operation.
OTGADevHNPChngEvnt18wtcReadable, write a 1 to clear0x0A-Dev HNP Change Event
Set in A-device Mode Only. The event is generated when there is an HNP attempt.
Note: This bit is applicable only for OTG 2.0 mode of operation.
A-Dev HNP Change EventEn (OTGADevHNPChngEvntEn)
When this bit is set, OEVT.OTGADevHNPChngEvnt is enabled. If not, the event is disabled
OTGADevSRPDetEvnt17wtcReadable, write a 1 to clear0x0SRP Detect Event
Set in A-device Mode Only.
This event is asserted when a session request from the B-device is detected via SRP.
Note: This bit is applicable for OTG 2.0 and OTG 3.0 modes of operation.
A-Dev HNP Change EventEn (OTGADevHNPChngEvntEn)
When this bit is set, OEVT.OTGADevHNPChngEvnt is enabled. If not, the event is disabled.
OTGADevSessEndDetEvnt16wtcReadable, write a 1 to clear0x0Session End Detected Event
Set in A-device Mode Only. This event is asserted when the utmiotg_vbusvalid signal goes low indicating the end of a session.
Note: This bit is applicable for OTG 2.0 and OTG 3.0 modes of operation.
When this bit is set, OEVT.OTGADevSessEndEvnt is enabled. If not, the event is disabled.
Reserved15:12roRead-only0x0Reserved
OTGBDevBHostEndEvnt11wtcReadable, write a 1 to clear0x0B-Device B-Host End Event
Set in B-device Mode Only. This event is generated when B-device has completed its host role.
Note: This bit is applicable for OTG 2.0 and OTG 3.0 modes of operation.
When this bit is set, OEVT.OTGBDevHostEndEvnt is enabled. If not, the event is disabled.
OTGBDevHNPChngEvnt10wtcReadable, write a 1 to clear0x0B-Dev HNP Change Event:
Set in B-Device Mode only. This event is generated when there is a Success or Failure of an HNP attempt.
Note: This bit is applicable for OTG 2.0 and OTG 3.0 modes of operation.
When this bit is set, OEVT.OTGBDevHNPChngEvnt is enabled. If not, the event is disabled.
OTGBDevSessVldDetEvnt 9wtcReadable, write a 1 to clear0x0Session Valid Detected Event
Set in B-device Mode Only. This event is asserted when there is a valid Vbus from A-device and B-device succeeds in starting a session.
Note: This bit is applicable for OTG 2.0 and OTG 3.0 modes of operation.
OTGBDevVBUSChngEvnt 8wtcReadable, write a 1 to clear0x0Vbus Change Event
Set in B-device Mode Only. This event is asserted when the utmisrp_bvalid signal goes low (indicating the end of a session), or goes high.
Note: This bit is applicable for OTG 2.0 and OTG 3.0 modes of operation.
When this bit is set, OEVT.OTGBDevVBUSChngEvnt is enabled. If not, the event is disabled.
Reserved 7:4roRead-only0x0Reserved
BSesVld 3roRead-only0Indicates the Device mode transceiver status.
Indicates the Device mode transceiver status. The core updates this bit when:
OEVTEN.OTGBDevVBUSChngEvnt is set.
- 1b0: B-session is not valid
- 1b1: B-session is valid
Note: This bit is applicable for OTG 2.0 and OTG 3.0 modes of operation.
HstNegSts 2roRead-only0Host Negotiation Status
The core updates this bit when any of the following bits is set:
- OEVTEN.OTGADevHNPChngEvnt
- OEVTEN.OTGBDevHNPChngEvnt
This bit indicates Host Negotiation Success or Failure.
1b0: Host negotiation failure.
- In A-device, for HS/FS, this indicates an imminent end of session indication from the core.
- In B-device, for HS/LS, it indicates that the timer used to wait for an A-device to signal a connection (b_ase0_brst_tmout in OTG 2.0) timed out resulting in B-device staying as B-peripheral.
1b1: Host negotiation success.
- This indicates that the host negotiation was successful.
Note: This bit is applicable only for OTG 2.0 mode of operation.
SesReqSts 1roRead-only0Session Request Status
Ignore this field. It is used only for
internal testing.
OEVTError 0wtcReadable, write a 1 to clear0x0OTG Event Error
There are no errors currently defined.