PPCS (SATA_AHCI_VENDOR) Register Description
Register Name | PPCS |
---|---|
Offset Address | 0x0000000048 |
Absolute Address | 0x00FD0C00E8 (SATA_AHCI_VENDOR) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0xF8000000 |
Description | Port Phy Status (PhyControlStatus). |
Indicates the status of the Phy Control Layer for either Port 0 or Port 1. The Port monitored is controlled by the value programmed into the Port Config Register. Note: All Status Registers have no predefined Reset value. The value shown in reset is a typical value that will be read after reset but will be dependent on the SERDES status, the actual value read can differ from this.
PPCS (SATA_AHCI_VENDOR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
PHYCE | 31:30 | roRead-only | 0x3 | Current 2 bit Code Error (PHYCE): snapshot within the Phy Control Layer |
PHYDE | 29:28 | roRead-only | 0x3 | Current 2 bit Disparity Error (PHYDE): snapshot within the Phy Control Layer |
PHYKC | 27 | roRead-only | 0x1 | Current 1 bit K Character (PHYKC): snapshot within the Phy Control Layer |
PHYD | 26:11 | roRead-only | 0x0 | Current 16 bit Data (PHYD): snapshot within the Phy Control Layer |
CCAC | 10 | wtcReadable, write a 1 to clear | 0x0 | Comma Alignment has changed (CCAC) |
CCA | 9:5 | roRead-only | 0x0 | Current Comma Alignment (CCA) |
PCTRLS | 4:0 | roRead-only | 0x0 | Phy Control State (PCTRLS) 0: HP0_HR_Start 1: HP1_HR_Reset 2: HP2_HR_AwaitCOMINIT 3: HP3_HR_Calibrate 4: HP4_HR_COMWAKE 5: HP5_HR_AwaitCOMWAKE 6: HP6_HR_AwaitAlign 7: HP7_HR_SendAlign 8: HP8_HR_Ready 9: HP9_HR_Partial 10: HP10_HR_Slumber 11: HP11_HR_AdjustSpeed 12: HP2B_HR_AwaitNoCOMINIT 13: HP5B_HR_AwaitNoCOMWAKE |