L3_TXPMA_ST_4 (SERDES) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

L3_TXPMA_ST_4 (SERDES) Register Description

Register NameL3_TXPMA_ST_4
Offset Address0x000000CB10
Absolute Address 0x00FD40CB10 (SERDES)
Width32
TyperoRead-only
Reset Value0x00000020
DescriptionRegister value is generated by Vivado PCW.

L3_TXPMA_ST_4 (SERDES) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
TXPMA_ST_4_31_8_rsvd31:8roRead-only0x0Value generated by PCW.
ana_st4_7_6_spare 7:6roRead-only0x0Value generated by PCW.
TX_useg_dp_rescal_code 5:0roRead-only0x20Value generated by PCW.