bank1_ctrl6 (IOU_SLCR) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

bank1_ctrl6 (IOU_SLCR) Register Description

Register Namebank1_ctrl6
Offset Address0x0000000168
Absolute Address 0x00FF180168 (IOU_SLCR)
Width26
TyperwNormal read/write
Reset Value0x00000000
DescriptionMIO Bank 1, Output slew rate select.

bank1_ctrl6 (IOU_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
slow_fast_slew_n25:0rwNormal read/write0x0Select between fast and slow output slew rates for MIO pins [26:51].
0 = fast slew rate.
1 = slow slew rate.
Bit [0] controls MIO pin 26.
..
Bit [25] controls MIO pin 51.
Bits [26] to [31] are reserved.