DIRM_0 (GPIO) Register Description
| Register Name | DIRM_0 |
|---|---|
| Offset Address | 0x0000000204 |
| Absolute Address | 0x00FF0A0204 (GPIO) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Direction mode (GPIO Bank0, MIO) |
This register controls whether the IO pin is acting as an input or an output. Since the input logic is always enabled, this effectively enables/disables the output driver. Each bit of the bank is independently controlled. This register controls bank0, which corresponds to MIO[25:0].
DIRM_0 (GPIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:26 | razRead as zero | 0x0 | Not used, read back as zero |
| DIRECTION_0 | 25:0 | rwNormal read/write | 0x0 | Direction mode 0: input 1: output Each bit configures the corresponding pin within the 26-bit bank |