Command_Register (NAND) Register Description
| Register Name | Command_Register |
|---|---|
| Offset Address | 0x000000000C |
| Absolute Address | 0x00FF10000C (NAND) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x01000000 |
| Description | Command and Configuration. |
Command_Register (NAND) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ECC_ON_OFF | 31 | rwNormal read/write | 0x0 | 1: ECC On. 0: ECC Off. Note: Change this value only when controller is not communicating with the memory device. |
| Number_of_Address_cycels | 30:28 | rwNormal read/write | 0x0 | 000: reserved 001: One Address cycle. 010: Two Address cycles. 110: Three Address cycles. .. 111:Seven Address cycles. Note: Change this value only when controller is not communicating with the memory device. |
| DMA_Enable | 27:26 | rwNormal read/write | 0x0 | 00: PIO Mode. 10: MDMA Mode. Others: reserved Note: Change this value only when controller is not communicating with the memory device. |
| page_size | 25:23 | rwNormal read/write | 0x2 | 000: 512-byte Page size. 001: 2KB Page size. 010: 4KB Page size. 011: 8KB Page size. 100: 16KB Page size. Others: reserved Note: Change this value only when controller is not communicating with the memory device. |
| Reserved | 22:16 | razRead as zero | 0x0 | reserved |
| command2 | 15:8 | rwNormal read/write | 0x0 | Opcode value for 2nd cycle command Note: Change this value only when controller is not communicating with the memory device. |
| command1 | 7:0 | rwNormal read/write | 0x0 | Opcode value for 1st cycle command. Note: Change this value only when controller is not communicating with the memory device. |