reg_dataport (SDIO) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

reg_dataport (SDIO) Register Description

Register Namereg_dataport
Offset Address0x0000000020
Absolute Address 0x00FF160020 (SD0)
0x00FF170020 (SD1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionRead/write internal buffer.

reg_dataport (SDIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
sdhcdmactrl_piobufrddata31:0rwNormal read/write0x0The Host Controller Buffer can be accessed through this 32-bit Data Port Register.