PP0_WB2_GLOBAL_TEST_ENABLE (GPU) Register Description
| Register Name | PP0_WB2_GLOBAL_TEST_ENABLE |
|---|---|
| Offset Address | 0x0000008324 |
| Absolute Address | 0x00FD4B8324 (GPU) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | WB2 Global Test Enable Register |
PP0_WB2_GLOBAL_TEST_ENABLE (GPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:1 | rwNormal read/write | 0x0 | Reserved, write as zero, read undefined. |
| WB2_GLOBAL_TEST_ENABLE | 0 | rwNormal read/write | 0x0 | Set to one to enable global write-back value testing WB2_SOURCE_SELECT FP_TILEBUF_ENABLE Global test data 1 - Z/Stencil Dont care Stencil 8-bit 2 - ARGB Color 0 Alpha 8-bit 3 - ARGB Color 1 Alpha FP16 |