DBG_TRACE_CTRL (CRF_APB) Register Description
| Register Name | DBG_TRACE_CTRL |
|---|---|
| Offset Address | 0x0000000064 |
| Absolute Address | 0x00FD1A0064 (CRF_APB) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00002500 |
| Description | Debug Trace Clock Generator Control. |
DBG_TRACE_CTRL (CRF_APB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:25 | rwNormal read/write | 0x0 | reserved |
| CLKACT | 24 | rwNormal read/write | 0x0 | Clock active control. 0: disable. Clock stop. 1: enable. |
| Reserved | 23:14 | rwNormal read/write | 0x0 | reserved |
| DIVISOR0 | 13:8 | rwNormal read/write | 0x25 | 6-bit divider. |
| Reserved | 7:3 | rwNormal read/write | 0x0 | reserved |
| SRCSEL | 2:0 | rwNormal read/write | 0x0 | Clock generator input source. 000: IOPLL_TO_FPD 010: DPLL 011: APLL |