| Register Name | Offset Address | Width | Type | Reset Value | Description |
|---|
| OCM_ERR_CTRL | 0x0000000000 | 32 | mixedMixed types. See bit-field details. | 0x0000000F | Enable/Disable a error response |
| OCM_ISR | 0x0000000004 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Status Register for intrN. This is a sticky register that holds the value of the interrupt until cleared by a value of 1. |
| OCM_IMR | 0x0000000008 | 32 | mixedMixed types. See bit-field details. | 0x000007FF | Interrupt Mask Register for intrN. This is a read-only location and can be atomically altered by either the IDR or the IER. |
| OCM_IEN | 0x000000000C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Enable Register. A write of to this location will unmask the interrupt. (IMR: 0) |
| OCM_IDS | 0x0000000010 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Disable Register. A write of one to this location will mask the interrupt. (IMR: 1) |
| OCM_ECC_CTRL | 0x0000000014 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | control register for OCM |
| OCM_CLR_EXE | 0x0000000018 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | CLEAR REGITER FOR EXLCUSIVE ACCESS MONITORS |
| OCM_CE_FFA | 0x000000001C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Correctable Error First Failing Address Register |
| OCM_CE_FFD0 | 0x0000000020 | 32 | roRead-only | 0x00000000 | Correctable Error First Failing Data Register (CE_FFD [31:0]) |
| OCM_CE_FFD1 | 0x0000000024 | 32 | roRead-only | 0x00000000 | Correctable Error First Failing Data Register (CE_FFD [63:32]) |
| OCM_CE_FFD2 | 0x0000000028 | 32 | roRead-only | 0x00000000 | Correctable Error First Failing Data Register (CE_FFD [95:64]) |
| OCM_CE_FFD3 | 0x000000002C | 32 | roRead-only | 0x00000000 | Correctable Error First Failing Data Register (CE_FFD [127:96]) |
| OCM_CE_FFE | 0x0000000030 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Correctable Error First Failing ECC Register |
| OCM_UE_FFA | 0x0000000034 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Uncorrectable Error First Failing Address Register |
| OCM_UE_FFD0 | 0x0000000038 | 32 | roRead-only | 0x00000000 | Uncorrectable Error First Failing Data Register (UE_FFD [31:0]) |
| OCM_UE_FFD1 | 0x000000003C | 32 | roRead-only | 0x00000000 | Uncorrectable Error First Failing Data Register (UE_FFD [63:32]) |
| OCM_UE_FFD2 | 0x0000000040 | 32 | roRead-only | 0x00000000 | Uncorrectable Error First Failing Data Register (UE_FFD [95:64]) |
| OCM_UE_FFD3 | 0x0000000044 | 32 | roRead-only | 0x00000000 | Uncorrectable Error First Failing Data Register (UE_FFD [127:96]) |
| OCM_UE_FFE | 0x0000000048 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Uncorrectable Error First Failing ECC Register |
| OCM_FI_D0 | 0x000000004C | 32 | rwNormal read/write | 0x00000000 | Fault Injection Data Register (FI_D0) |
| OCM_FI_D1 | 0x0000000050 | 32 | rwNormal read/write | 0x00000000 | Fault Injection Data Register (FI_D1) |
| OCM_FI_D2 | 0x0000000054 | 32 | rwNormal read/write | 0x00000000 | Fault Injection Data Register (FI_D2) |
| OCM_FI_D3 | 0x0000000058 | 32 | rwNormal read/write | 0x00000000 | Fault Injection Data Register (FI_D3) |
| OCM_FI_SY | 0x000000005C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Fault Injection Syndrome Register (FI_SY) |
| OCM_RMW_UE_FFA | 0x0000000070 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | RMW uncorrectable error log register |
| OCM_FI_CNTR | 0x0000000074 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Fault Injection Count Register |
| OCM_IMP | 0x0000000080 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | OCM Implementation Register |
| OCM_PRDY_DBG | 0x0000000084 | 32 | mixedMixed types. See bit-field details. | 0x0000FFFF | OCM PRDY Debug register |
| OCM_SAFETY_CHK | 0x0000000FF8 | 32 | rwNormal read/write | 0x00000000 | OCM Safety Check Register |