STATUS (GPU) Register Description
| Register Name | STATUS |
|---|---|
| Offset Address | 0x0000001008 |
| Absolute Address | 0x00FD4B1008 (GPU) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | Status Register |
STATUS (GPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:2 | roRead-only | 0x0 | Reserved, read as zero |
| Data_busy | 1 | roRead-only | 0x0 | Set when the cache is busy handling data |
| Command_busy | 0 | roRead-only | 0x0 | Set when the cache is busy handling commands |