INT_STAT_3 (GPIO) Register Description
| Register Name | INT_STAT_3 |
|---|---|
| Offset Address | 0x00000002D8 |
| Absolute Address | 0x00FF0A02D8 (GPIO) |
| Width | 32 |
| Type | wtcReadable, write a 1 to clear |
| Reset Value | 0x00000000 |
| Description | Interrupt Status (GPIO Bank3, EMIO Bank0) |
This register operates in exactly the same manner as INT_STAT_0, except that it reflects bank3, which corresponds to EMIO[31:0].
INT_STAT_3 (GPIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| INT_STATUS_3 | 31:0 | wtcReadable, write a 1 to clear | 0x0 | Interrupt status Upon read: 0: no interrupt 1: interrupt event has occurred Upon write: 0: no action 1: clear interrupt status bit Each bit configures the corresponding pin within the 32-bit bank |