VCU_DEC_CACHE_AXI_PROT (VCU_SLCR) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

VCU_DEC_CACHE_AXI_PROT (VCU_SLCR) Register Description

Register NameVCU_DEC_CACHE_AXI_PROT
Offset Address0x000000005C
Absolute Address 0x00A004005C (VCU_SLCR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00002222
DescriptionCaution! The fields in this regsiter must not be changed while the VCU is active and AXI traffic is being produced. It is recommended that this field only change during 'idle/inactive' periods of the VCU

VCU_DEC_CACHE_AXI_PROT (VCU_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:16razRead as zero0x0reserved
awcache115:12rwNormal read/write0x2AXI Write Cache Port 1
arcache111:8rwNormal read/write0x2AXI Read Cache Port 1
awcache0 7:4rwNormal read/write0x2AXI Write Cache Port 0
arcache0 3:0rwNormal read/write0x2AXI Read Cache Port 0