DQSDR1 (DDR_PHY) Register Description
| Register Name | DQSDR1 |
|---|---|
| Offset Address | 0x0000000254 |
| Absolute Address | 0x00FD080254 (DDR_PHY) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0xA8000000 |
| Description | DQS Drift Register 1 |
DQSDR1 (DDR_PHY) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| DFTUPDACKF | 31:29 | rwNormal read/write | 0x5 | Drift DFU Update Request ACK to DQS Drift FSM issuing IDLE Read Cycles Factor |
| DFTUPDACKC | 28:24 | rwNormal read/write | 0x8 | Return zeroes on reads. |
| DFTRDB2BF | 23:20 | rwNormal read/write | 0x0 | Drift Back-to-Back Read Cycles Factor: Specifies the multiplication factor for the value specified in DQSDR.DFTRDB2BC. Valid values are 0 = Multiply by 2^0 (1) 1 = Multiply by 2^1 2 = Multiply by 2^2 3 = Multiply by 2^4 4 = Multiply by 2^5 5 = Multiply by 2^8 6 = Multiply by 2^10 7 = Multiply by 2^12 8 = Multiply by 2^15 9 = Multiply by 2^16 10 = Multiply by 2^20 11 = Multiply by 2^24 12 = Multiply by 2^25 13 = Multiply by 2^28 14 = Multiply by 2^30 15 = Multiply by 2^32 |
| DFTRDIDLF | 19:16 | rwNormal read/write | 0x0 | Drift Idle Read Cycles Factor: Specifies the multiplication factor for the value specified in DQSDR.DFTRDIDLC. Valid values are 0 = Multiply by 2^0 (1) 1 = Multiply by 2^1 2 = Multiply by 2^2 3 = Multiply by 2^4 4 = Multiply by 2^5 5 = Multiply by 2^8 6 = Multiply by 2^10 7 = Multiply by 2^12 8 = Multiply by 2^15 9 = Multiply by 2^16 10 = Multiply by 2^20 11 = Multiply by 2^24 12 = Multiply by 2^25 13 = Multiply by 2^28 14 = Multiply by 2^30 15 = Multiply by 2^32 |
| DFTRDB2BC | 15:8 | rwNormal read/write | 0x0 | Drift Back-to-Back Read Cycles: Specifies the number of continuous back-to-back read clock cycles from the controller after which the PUB should interrupt the controller so that it can update drift. This is useful if the PUB is configured not to detect drift on every cycle, i.e. when DFTGPULSE is set to 4'b000. The value specified in this field is multiplied by a factor specified in DQSDR1.DFTRDB2BF. Specifying a value of 0 disables the PUB from interrupting controller back-to-back reads. |
| DFTRDIDLC | 7:0 | rwNormal read/write | 0x0 | Drift Idle Read Cycles: Specifies the number of clock cycles after which the PUB should generate reads when there have been no reads from the controller. The value specified in this field is multiplied by a factor specified in DQSDR1.DFTRDIDLF. Specifying a value of 0 disables the PUB from issuing these reads. |