PP1_WB1_TARGET_ADDR (GPU) Register Description
| Register Name | PP1_WB1_TARGET_ADDR |
|---|---|
| Offset Address | 0x000000A204 |
| Absolute Address | 0x00FD4BA204 (GPU) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | WB1 Target Address Register |
PP1_WB1_TARGET_ADDR (GPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| WB1_TARGET_ADDR | 31:3 | rwNormal read/write | 0x0 | The start address in memory of the target buffer |
| Reserved | 2:0 | rwNormal read/write | 0x0 | Reserved, write as zero, read undefined. |