ZDMA_CH_WR_ONLY_WORD2 (ZDMA) Register Description
| Register Name | ZDMA_CH_WR_ONLY_WORD2 |
|---|---|
| Offset Address | 0x0000000150 |
| Absolute Address |
0x00FFA80150 (ADMA_CH0) 0x00FFA90150 (ADMA_CH1) 0x00FFAA0150 (ADMA_CH2) 0x00FFAB0150 (ADMA_CH3) 0x00FFAC0150 (ADMA_CH4) 0x00FFAD0150 (ADMA_CH5) 0x00FFAE0150 (ADMA_CH6) 0x00FFAF0150 (ADMA_CH7) 0x00FD500150 (GDMA_CH0) 0x00FD510150 (GDMA_CH1) 0x00FD520150 (GDMA_CH2) 0x00FD530150 (GDMA_CH3) 0x00FD540150 (GDMA_CH4) 0x00FD550150 (GDMA_CH5) 0x00FD560150 (GDMA_CH6) 0x00FD570150 (GDMA_CH7) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Write Only Data Word 2 |
This register must remain stable while DMA Channel is enabled
ZDMA_CH_WR_ONLY_WORD2 (ZDMA) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| DATA | 31:0 | rwNormal read/write | 0x0 | In DMA write only mode, this bits are used to write the DST address location (bits [95:64]). Used only for FPD DMA (LPD DMA is 64-bit AXI master). |