PxCI (SATA_AHCI_PORTCNTRL) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

PxCI (SATA_AHCI_PORTCNTRL) Register Description

Register NamePxCI
Offset Address0x0000000038
Absolute Address 0x00FD0C0138 (SATA_AHCI_PORT0_CNTRL)
0x00FD0C01B8 (SATA_AHCI_PORT1_CNTRL)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPxCI: Port x Command Issue

PxCI (SATA_AHCI_PORTCNTRL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CI31:0rwNormal read/write0x0Commands Issued (CI): This field is bit significant. Each bit corresponds to a command slot, where bit 0 corresponds to command slot 0. This field is set by software to indicate to the HBA that a command has been built in system memory for a command slot and may be sent to the device.
When the HBA receives a FIS which clears the BSY, DRQ, and ERR bits for the command, it clears the corresponding bit in this register for that command slot. Bits in this field shall only be set to 1 by software when PxCMD.ST is set to 1. This field is also cleared when PxCMD.ST is written from a 1 to a 0 by software.