Memory_Address_Register1 (NAND) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

Memory_Address_Register1 (NAND) Register Description

Register NameMemory_Address_Register1
Offset Address0x0000000004
Absolute Address 0x00FF100004 (NAND)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMemory Address, reg 1.

Note: Change value in this register only when controller is not communicating with the memory device.

Memory_Address_Register1 (NAND) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Memory_Address31:0rwNormal read/write0x0Consider page size 4k, 4plane, 2Lun flash device.
bit[12:0] indicates column address.
bit[15:13] set = 0.
bit[22:16] page address.
bit[24:23] interleaved address bits:
00: Interleaved address 0 selected (plane 0).
01: Interleaved address 1 selected (plane 1).
10: Interleaved address 2 selected (plane 2).
11: Interleaved address 3 selected (plane 3).
bit[31:25] block address.
Remaining block address bits are programmed in Memory address Register2.