imr (LPD_SLCR_SECURE) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

imr (LPD_SLCR_SECURE) Register Description

Register Nameimr
Offset Address0x000000000C
Absolute Address 0x00FF4B000C (LPD_SLCR_SECURE)
Width 1
TyperoRead-only
Reset Value0x00000001
DescriptionInterrupt Mask Register

Read-only register that is atomically altered by either the IDR or the IER registers.

imr (LPD_SLCR_SECURE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
addr_decode_err 0roRead-only0x1Mask for an address decode error.
0: Interrupt Enabled
1: Interrupt Disabled