_register_changes_1.1-1.2.html

_register_changes_1.1-1.2.html - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID

UG1087

Release Date

2024-03-13

Revision

1.10

Register Changes Between v1.1 and v1.2

Modules with Registers Removed

Modules	Registers
afifm	afifm_wrctrl, afifm_rdqos, afifm_i_en, afifm_safety_chk, afifm_rdctrl, afifm_wrqos, afifm_i_sts, afifm_i_dis, afifm_control, afifm_rdissue, afifm_wrissue, afifm_i_mask, afifm_rddebug
can	msr, rxfifo_id, txhpb_data1, afmr1, rxfifo_data2, icr, txfifo_data1, txhpb_data2, btr, brpr, afir2, afmr4, rxfifo_dlc, afir4, afir3, afmr2, isr, ecr, tcr, wir, sr, afir1, txhpb_id, afmr3, srr, ier, txfifo_dlc, esr, afr, txfifo_data2, txhpb_dlc, txfifo_id, rxfifo_data1
crf_apb	gdma_ref_ctrl
crl_apb	adma_ref_ctrl, saftey_chk
efuse	efuse_eco
gpio	int_mask_0, dirm_0, oen_0, int_any_0, int_dis_0, int_type_0, mask_data_0_msw, int_stat_0, mask_data_0_lsw, int_polarity_0, int_en_0, data_0
i2c	interrupt_status_reg0, transfer_size_reg0, time_out_reg0, status_reg0, slave_mon_pause_reg0, intrpt_disable_reg0, control_reg0, intrpt_enable_reg0, i2c_address_reg0, intrpt_mask_reg0, i2c_data_reg0
ipi	pl_3_imr, pl_3_trig, pl_1_obs, rpu_1_obs, pl_0_obs, pl_2_idr, apu_idr, apu_trig, apu_imr, apu_isr, pl_0_idr, pl_2_isr, pl_1_trig, pl_1_ier, rpu_0_idr, pl_2_ier, rpu_1_ier, pl_0_ier, pl_3_isr, pl_0_trig, rpu_0_imr, pl_1_imr, rpu_1_trig, pl_2_trig, rpu_1_idr, rpu_0_ier, rpu_0_trig, pl_2_imr, pl_1_isr, pl_0_imr, pl_1_idr, pl_3_ier, rpu_0_isr, rpu_1_imr, pl_3_obs, pl_3_idr, apu_ier, pl_0_isr, apu_obs, rpu_0_obs, pl_2_obs, rpu_1_isr
nand	memory_address_register1
ocm	ocm_ecc_cntl
qspi	gqspi_gen_fifo, intrpt_en_reg, gqspi_p_timeout, txd0, gqspi_fifo_ctrl, lqspi_sts, config_reg, gqspi_en_reg, gqspi_tx_thresh, gqspi_gf_thresh, tx_thres_reg, txd3, gqspi_sel, gqspi_rx_thresh, txd1, qspi_intrpt_mask_reg, en_reg, intrpt_dis_reg, rx_data_reg, gqspi_rxd, gqspi_idr, slave_idle_count_reg, gqspi_cfg, gqspi_gpio, lqspi_cfg, txd2, gqspi_poll_cfg, delay_reg, gqspi_isr, gqspi_lpbk_dly_adj, cmnd_reg, gqspi_mod_id, qspi_data_dly_adj, intr_status_reg, gqspi_imask, gqspi_ier, gqspi_txd
spi	tx_thres_reg0, rx_data_reg0, slave_idle_count_reg0, delay_reg0, config_reg0, intrpt_en_reg0, intrpt_dis_reg0, intrpt_mask_reg0, intr_status_reg0, en_reg0, tx_data_reg0
swdt	status, control, restart, mode
ttc	interrupt_enable_1, match_2_counter_1, clock_control_1, counter_value_1, interval_counter_1, match_1_counter_1, match_3_counter_1, interrupt_register_1, counter_control_1
uart	rcvr_fifo_trigger_level0, baud_rate_gen_reg0, intrpt_mask_reg0, channel_sts_reg0, rcvr_timeout_reg0, tx_rx_fifo0, intrpt_dis_reg0, intrpt_en_reg0, modem_ctrl_reg0, chnl_int_sts_reg0, modem_sts_reg0, control_reg0, mode_reg0
vcu_slcr	alg_enc_core_ctrl, alg_vcu_axi_ctrl, alg_enc_mcu_ctrl, alg_dec_core_ctrl, alg_dec_mcu_ctrl

Modules with Changes to Registers

Modules	Registers
afifm
alg_vcu_dec_top	mcu_addr_offset_dc0, axi_rbl0, mcu_addr_offset_ic0, itc_mcu_irq, itc_cpu_irq_msk, mcu_reset_mode, axi_rbw1, axi_wbw1, mcu_addr_offset_dc1, axi_rbl1, mcu_addr_offset_ic1, mcu_reset, itc_cpu_irq_sta, mcu_wakeup, axi_addr_offset_ip, axi_bw, axi_wbw0, mcu_sta, itc_cpu_irq_clr, axi_rbw0
alg_vcu_enc_top	itc_cpu_irq_msk, axi_addr_offset_ip, mcu_reset, axi_rbl1, itc_mcu_irq, mcu_reset_mode, axi_bw, itc_cpu_irq_sta, mcu_wakeup, mcu_addr_offset_dc1, axi_rbw0, mcu_addr_offset_ic1, mcu_addr_offset_dc0, axi_wbw1, axi_rbw1, mcu_addr_offset_ic0, mcu_sta, axi_wbw0, axi_rbl0, itc_cpu_irq_clr
crf_apb	rst_fpd_top
crl_apb	rst_lpd_iou2, rst_lpd_top
csu	csu_rom_digest_5
iou_slcr	sdio_clk_ctrl, bank1_ctrl5, sd_config_reg1, sd_dll_ctrl, gem_ctrl, gem_clk_ctrl, sd_config_reg2
ipi	ipi_imr, pmu_2_ier, pmu_2_idr, pmu_0_isr, pmu_3_idr, pmu_3_isr, pmu_0_obs, pmu_1_ier, pmu_0_ier, pmu_1_imr, ipi_ctrl, pmu_2_trig, pmu_1_idr, pmu_3_trig, pmu_1_obs, pmu_2_isr, pmu_0_trig, pmu_1_isr, pmu_3_obs, pmu_3_ier, pmu_2_imr, pmu_0_imr, ipi_isr, pmu_2_obs, pmu_1_trig, ipi_ier, pmu_3_imr, ipi_idr, pmu_0_idr
nand	timing_register, ecc_register
rtc	control
ttc	interval_counter_2, counter_value_3, match_1_counter_3, match_3_counter_2, interrupt_register_2, counter_value_2, interrupt_register_3, clock_control_2, match_1_counter_2, counter_control_3, clock_control_3, match_2_counter_3, interval_counter_3, match_2_counter_2, match_3_counter_3, counter_control_2
usb3_xhci	gusb3pipectl
vcu_slcr	apm2_result11, apm3_result19, apm2_result18, apm0_result15, apm3_cfg, apm1_result2, apm2_result8, apm1_result13, apm2_result21, apm1_result9, apm0_result19, apm3_result0, apm3_result13, apm2_result14, apm0_result11, apm2_result2, apm3_result21, apm1_result12, apm2_timer, pll_status, apm2_result23, apm0_result16, apm2_result17, apm2_result16, apm2_result12, apm0_result7, apm3_result11, apm0_result22, apm2_result6, apm3_result1, apm1_timer, apm3_result20, apm2_result19, apm2_result4, apm1_cfg, vcu_ids, apm1_result23, apm3_result7, apm1_result1, apm0_result14, apm1_result24, apm3_result16, apm2_result9, apm3_result8, vcu_pll_cfg, apm0_timer, apm1_result7, apm2_result3, apm0_result0, apm1_result19, apm2_result24, apm2_cfg, apm1_result6, apm3_trg, apm3_result4, apm1_result18, vcu_pll_ctrl, apm0_result17, apm0_result24, apm0_result23, apm2_result7, apm0_result18, apm1_result10, apm1_result0, apm0_result4, apm1_result22, apm1_result15, vcu_ien, apm2_result5, crl_wprot, apm3_result14, apm2_result13, apm2_result0, apm0_result10, apm3_result23, apm0_result12, apm0_cfg, apm0_result2, vcu_version, apm1_result16, apm3_result22, apm2_result15, apm1_result21, apm3_result18, apm3_timer, apm0_result5, apm2_result1, apm1_result14, apm2_result10, apm3_result24, apm3_result3, apm1_result5, apm3_result15, apm0_result8, apm0_result21, apm3_result5, vcu_isr, apm0_result1, vcu_err_ctrl, apm1_result11, apm0_trg, apm1_result20, apm3_result12, apm1_result17, apm0_result3, apm0_result13, apm2_result22, apm2_trg, vcu_imr, apm1_result8, apm3_result6, apm3_result2, apm1_result3, apm3_result9, apm1_result4, apm0_result9, apm3_result10, apm0_result6, apm2_result20, apm3_result17, apm1_trg, apm0_result20
xmpu_ddr	r01_master, r10_end, r13_start, r09_master, r06_end, r02_master, r01_config, r01_end, r06_start, r00_start, r14_config, r12_master, r10_master, r11_master, r00_end, imr, err_status1, r06_config, r03_end, r04_start, r10_start, r13_end, r15_config, r09_config, r10_config, r05_start, ctrl, r14_start, r02_end, r08_end, r09_start, r07_end, r12_end, r07_master, r08_start, r13_master, err_status2, r03_config, r05_config, r11_end, r08_config, r11_start, r04_config, r15_start, r04_master, r03_start, r08_master, lock, r00_master, r14_end, r05_end, r14_master, poison, r05_master, r15_end, r04_end, r02_start, ien, r07_start, r06_master, r09_end, r01_start, r03_master, isr, r00_config, r13_config, r12_config, ids, r07_config, r02_config, r15_master, r11_config, r12_start
xmpu_fpd	lock, r14_end, r06_master, r05_master, r02_config, r13_config, r14_start, r10_end, r10_config, r02_end, r11_config, r00_master, r11_end, r03_end, r07_master, r13_master, r09_config, r04_config, r15_config, r14_master, r07_config, r04_end, r15_master, r03_master, imr, r00_start, r12_master, r06_end, ids, r11_start, r07_end, r03_start, r00_end, r14_config, r05_start, r10_start, r12_start, r08_master, r12_end, r08_config, r06_start, r00_config, err_status2, r05_end, r06_config, r07_start, isr, r09_start, r01_start, poison, r13_start, ctrl, r15_end, r04_start, r05_config, r08_start, r01_master, r12_config, err_status1, r04_master, r09_end, r01_end, r02_start, r03_config, r01_config, r09_master, r02_master, r10_master, r15_start, r08_end, r13_end, r11_master, ien
xmpu_ocm	r14_end, r00_master, r04_config, r01_end, r10_start, r10_end, r06_start, ien, r03_end, r02_config, err_status1, r04_end, r14_start, r05_end, r15_start, r00_end, r04_master, r12_master, imr, r06_master, r12_config, r09_end, r02_end, poison, r14_config, r05_start, r05_master, r13_master, r03_config, ctrl, r08_config, r11_end, r15_end, r02_start, r13_end, r00_config, r12_end, r08_end, r13_config, r07_start, r03_master, r08_start, r01_master, r08_master, r06_config, r11_config, r07_end, r03_start, r04_start, r15_config, isr, r13_start, r01_config, err_status2, r12_start, r11_master, r07_config, r14_master, r11_start, r02_master, r07_master, r09_master, ids, r10_config, r01_start, r05_config, lock, r00_start, r10_master, r09_start, r06_end, r15_master, r09_config
xmpu_sink	isr, imr, err_status, err_ctrl, idr, ier
xppu	aperperm_341, aperperm_111, aperperm_309, aperperm_115, aperperm_195, aperperm_243, aperperm_046, aperperm_202, aperperm_144, master_id19, isr, aperperm_336, aperperm_105, aperperm_140, aperperm_285, aperperm_279, aperperm_323, aperperm_347, aperperm_281, aperperm_181, aperperm_382, aperperm_200, aperperm_276, aperperm_270, aperperm_125, aperperm_033, aperperm_057, aperperm_233, aperperm_084, master_id08, aperperm_005, aperperm_076, aperperm_327, aperperm_086, aperperm_062, aperperm_159, aperperm_354, aperperm_232, aperperm_066, aperperm_220, master_id06, aperperm_103, aperperm_208, aperperm_231, aperperm_261, aperperm_247, aperperm_362, aperperm_044, aperperm_301, aperperm_166, aperperm_133, aperperm_088, aperperm_282, aperperm_151, aperperm_287, aperperm_100, aperperm_312, aperperm_377, aperperm_303, aperperm_283, aperperm_288, aperperm_119, aperperm_374, aperperm_335, aperperm_102, aperperm_108, aperperm_337, aperperm_241, aperperm_368, aperperm_127, aperperm_009, aperperm_296, aperperm_025, aperperm_263, aperperm_393, aperperm_048, aperperm_075, aperperm_265, aperperm_310, aperperm_104, aperperm_040, aperperm_326, aperperm_339, aperperm_052, aperperm_371, aperperm_167, aperperm_284, aperperm_142, aperperm_130, aperperm_092, aperperm_080, aperperm_269, aperperm_082, aperperm_332, aperperm_091, aperperm_058, aperperm_399, aperperm_123, aperperm_022, aperperm_277, aperperm_098, aperperm_197, aperperm_395, aperperm_001, aperperm_194, aperperm_376, aperperm_188, aperperm_158, aperperm_317, aperperm_012, aperperm_244, aperperm_063, aperperm_050, aperperm_145, aperperm_321, master_id16, aperperm_036, aperperm_078, aperperm_173, aperperm_258, aperperm_116, aperperm_251, aperperm_246, aperperm_396, aperperm_237, aperperm_150, aperperm_334, aperperm_212, aperperm_047, aperperm_259, aperperm_375, aperperm_118, aperperm_182, m_aperture_512mb, aperperm_329, aperperm_180, imr, aperperm_298, aperperm_024, aperperm_203, aperperm_322, master_id00, aperperm_175, aperperm_352, aperperm_252, aperperm_342, aperperm_369, aperperm_372, aperperm_297, master_id02, aperperm_043, aperperm_124, aperperm_364, aperperm_224, aperperm_038, aperperm_041, aperperm_267, aperperm_177, aperperm_392, master_id18, aperperm_153, aperperm_256, aperperm_223, aperperm_143, aperperm_315, aperperm_049, aperperm_357, aperperm_363, aperperm_381, aperperm_209, aperperm_307, aperperm_239, aperperm_106, aperperm_122, aperperm_289, master_id11, aperperm_344, aperperm_215, aperperm_059, aperperm_280, aperperm_221, aperperm_294, base_512mb, aperperm_349, aperperm_109, aperperm_128, aperperm_348, master_id05, aperperm_007, aperperm_168, aperperm_097, aperperm_030, master_id04, aperperm_300, aperperm_391, aperperm_207, aperperm_234, master_id14, aperperm_316, aperperm_008, aperperm_333, aperperm_164, aperperm_319, aperperm_094, aperperm_010, aperperm_214, aperperm_328, aperperm_192, aperperm_002, aperperm_093, aperperm_213, aperperm_184, aperperm_211, aperperm_042, aperperm_248, aperperm_205, aperperm_083, aperperm_018, aperperm_254, aperperm_183, master_id01, aperperm_156, aperperm_161, aperperm_196, aperperm_027, aperperm_378, aperperm_099, aperperm_029, aperperm_020, aperperm_367, aperperm_170, aperperm_034, aperperm_236, aperperm_351, aperperm_394, aperperm_013, aperperm_274, aperperm_266, aperperm_291, aperperm_358, aperperm_242, aperperm_016, aperperm_365, aperperm_152, master_id12, aperperm_107, aperperm_324, aperperm_079, aperperm_179, aperperm_176, aperperm_245, aperperm_113, aperperm_373, aperperm_089, aperperm_069, aperperm_072, aperperm_345, aperperm_228, aperperm_028, aperperm_286, aperperm_253, aperperm_157, aperperm_120, aperperm_295, master_id03, aperperm_189, ctrl, aperperm_074, aperperm_206, aperperm_191, aperperm_137, aperperm_235, aperperm_039, aperperm_061, aperperm_356, aperperm_398, aperperm_380, master_id09, aperperm_198, aperperm_389, aperperm_249, aperperm_131, ien, aperperm_370, aperperm_187, aperperm_096, master_id10, aperperm_070, aperperm_174, aperperm_318, aperperm_397, aperperm_379, aperperm_313, aperperm_031, aperperm_064, aperperm_019, aperperm_257, master_id07, aperperm_229, aperperm_114, aperperm_366, base_64kb, aperperm_360, aperperm_325, aperperm_201, aperperm_262, aperperm_272, poison, aperperm_149, aperperm_053, aperperm_026, aperperm_155, aperperm_260, aperperm_035, aperperm_003, aperperm_054, aperperm_147, aperperm_015, aperperm_219, aperperm_068, aperperm_361, ids, aperperm_021, aperperm_139, aperperm_095, aperperm_162, m_aperture_32b, aperperm_390, aperperm_077, aperperm_141, aperperm_268, aperperm_292, aperperm_135, aperperm_343, aperperm_073, aperperm_178, aperperm_160, aperperm_238, aperperm_255, aperperm_169, aperperm_110, aperperm_227, aperperm_359, master_id13, aperperm_006, aperperm_146, aperperm_190, aperperm_387, aperperm_383, master_id15, aperperm_275, aperperm_121, aperperm_136, aperperm_199, err_status1, aperperm_314, aperperm_304, aperperm_067, aperperm_165, aperperm_290, aperperm_330, base_32b, aperperm_017, aperperm_250, aperperm_331, aperperm_230, aperperm_306, aperperm_225, aperperm_216, aperperm_090, aperperm_171, aperperm_350, aperperm_045, aperperm_071, err_status2, aperperm_278, aperperm_388, aperperm_385, aperperm_056, aperperm_112, aperperm_355, aperperm_193, aperperm_004, aperperm_338, aperperm_000, aperperm_353, master_id17, aperperm_271, aperperm_032, aperperm_126, aperperm_154, aperperm_134, aperperm_340, aperperm_218, aperperm_346, aperperm_185, aperperm_023, m_master_ids, aperperm_320, aperperm_148, aperperm_087, m_aperture_64kb, base_1mb, aperperm_172, aperperm_222, aperperm_311, aperperm_163, aperperm_117, aperperm_011, aperperm_400, aperperm_186, aperperm_065, aperperm_293, aperperm_085, aperperm_302, m_aperture_1mb, aperperm_101, aperperm_138, aperperm_081, aperperm_226, aperperm_129, aperperm_132, aperperm_051, aperperm_014, aperperm_055, aperperm_240, aperperm_273, aperperm_308, aperperm_386, aperperm_060, aperperm_305, aperperm_299, aperperm_210, aperperm_384, aperperm_204, aperperm_264, aperperm_037, aperperm_217
xppu_sink	imr, isr, err_status, ier, err_ctrl, idr
zdma	zdma_ch_data_attr, zdma_ch_dst_dscr_word1, zdma_ch_ien, zdma_ch_wr_only_word3, zdma_ch_isr, zdma_ch_dscr_attr, zdma_ch_rate_ctrl, zdma_ch_irq_src_acct, zdma_ch_irq_dst_acct, zdma_ch_src_dscr_word0, zdma_err_ctrl, zdma_ch_wr_only_word1, zdma_ch_wr_only_word0, zdma_ch_wr_only_word2, zdma_ch_src_dscr_word1, zdma_ch_dst_dscr_word3, zdma_ch_src_start_msb, zdma_ch_dst_start_msb, zdma_ch_ctrl0, zdma_ch_dst_start_lsb, zdma_ch_ids, zdma_ch_dst_dscr_word0, zdma_ch_src_start_lsb, zdma_ch_imr, zdma_ch_src_dscr_word3, zdma_ch_dst_dscr_word2, zdma_ch_ctrl2, zdma_ch_fci, zdma_ch_ctrl1, zdma_ch_src_dscr_word2, zdma_ch_status

Modules with Registers Added

Modules	Registers
afifm	i_en, wrqos, i_sts, wrctrl, control, rdissue, wrissue, i_dis, i_mask, rdctrl, safety_chk, rddebug, rdqos
can	xcanps_rxfifo_dw2_offset, xcanps_brpr_offset, xcanps_txfifo_dw2_offset, xcanps_txhpb_dw1_offset, xcanps_wir_offset, xcanps_afmr1_offset, xcanps_txhpb_dlc_offset, xcanps_rxfifo_dlc_offset, xcanps_ecr_offset, xcanps_txfifo_dlc_offset, xcanps_afr_offset, xcanps_afmr2_offset, xcanps_rxfifo_id_offset, xcanps_txfifo_dw1_offset, xcanps_esr_offset, xcanps_rxfifo_dw1_offset, xcanps_afir2_offset, xcanps_txfifo_id_offset, xcanps_sr_offset, xcanps_ier_offset, xcanps_afir3_offset, xcanps_afmr3_offset, xcanps_txhpb_dw2_offset, xcanps_srr_offset, xcanps_isr_offset, xcanps_icr_offset, xcanps_afmr4_offset, xcanps_afir1_offset, xcanps_msr_offset, xcanps_afir4_offset, xcanps_btr_offset, xcanps_tcr_offset, xcanps_txhpb_id_offset
crf_apb	fpd_dma_ref_ctrl
crl_apb	lpd_dma_ref_ctrl, safety_chk
efuse	ipdisable, efuse_misc
gpio	xgpiops_intsts_offset, xgpiops_data_lsw_offset, xgpiops_inten_offset, xgpiops_data_msw_offset, xgpiops_data_offset, xgpiops_dirm_offset, xgpiops_inttype_offset, xgpiops_intpol_offset, xgpiops_intmask_offset, xgpiops_outen_offset, xgpiops_intany_offset, xgpiops_intdis_offset
i2c	xiicps_idr_offset, xiicps_isr_offset, xiicps_ier_offset, xiicps_imr_offset, xiicps_slv_pause_offset, xiicps_cr_offset, xiicps_addr_offset, xiicps_trans_size_offset, xiicps_time_out_offset, xiicps_data_offset, xiicps_sr_offset
ipi	channel1_trig, channel0_trig, channel1_isr, channel3_isr, channel5_trig, channel4_ier, channel5_obs, channel2_ier, channel5_idr, channel6_obs, channel4_trig, channel0_isr, channel3_idr, channel3_obs, channel0_obs, channel6_isr, channel1_obs, channel1_idr, channel6_ier, channel3_imr, channel4_obs, channel3_ier, channel5_ier, channel1_imr, channel4_idr, channel4_imr, channel2_isr, channel3_trig, channel6_trig, channel4_isr, channel1_ier, channel0_ier, channel2_imr, channel2_trig, channel5_isr, channel6_idr, channel2_obs, channel0_imr, channel0_idr, channel2_idr, channel6_imr, channel5_imr
nand	xgpiops_data_msw_offset
ocm	ocm_ecc_ctrl
qspi	xgqspips_fifo_ctrl_offset, xqspips_sicr_offset, xqspips_ier_offset, xqspips_er_offset, xgqspips_en_offset, xqspips_txwr_offset, xgqspips_imr_offset, xgqspips_tx_thresh_offset, xgqspips_cr_offset, xqspips_lqspi_cmd_offset, xgqspips_ier_offset, xqspips_imr_offset, xgqspips_gen_fifo_offset, xqspips_cr_offset, xgqspips_tx_fifo_offset, xqspips_idr_offset, xqspips_lqspi_cr_offset, xgqspips_gpio_thresh_offset, xqspips_txd_11_offset, xgqspi_sel_offset, xqspips_txd_10_offset, xqspips_lqspi_sr_offset, xgqspips_eco_offset, xqspips_dr_offset, xgqspips_isr_offset, xgqspips_mod_id_offset, xqspips_rxd_offset, xgqspips_poll_offset, xgqspips_rx_fifo_offset, xgqspips_genfifo_thrsh_offset, xqspips_sr_offset, xgqspips_lpbk_dly_adj_offset, xgqspips_poll_timeout_offset, xgqspips_idr_offset, xgqspips_rx_thresh_offset, xqspips_txd_01_offset, xqspips_txd_00_offset
serdes	l0_tm_e_ill2, l0_tm_ill8, l3_tm_iq_ill3, l3_tm_iq_ill9, l2_tm_iq_ill1, l2_tm_misc2, l3_tm_e_ill9, l2_tm_e_ill8, l2_tm_ill15, l2_tm_iq_ill2, l2_tm_ill8, l0_tm_e_ill9, l2_tm_eq1, l2_tm_eq0, l3_tm_pll_dig_31, l1_tm_ana_byp_15, l3_tm_ana_byp_15, l2_tm_ana_byp_12, l1_tm_ill11, l3_tm_pll_dig_33, l3_tm_e_ill3, l1_tm_e_ill9, l2_tm_iq_ill9, l0_tm_iq_ill1, l0_tm_e_ill1, l0_tm_ill12, l2_tm_ill11, l2_tm_e_ill1, l1_tm_cdr16, l2_tm_iq_ill3, l3_tm_cdr5, l0_tm_misc2, l1_tm_misc2, l2_tm_cdr5, l1_tm_eq1, l3_tm_e_ill8, l1_tm_ill15, l1_tm_dig_10, l1_tm_cdr5, l0_tm_ana_byp_12, l3_tm_rst_dly, l1_tm_e_ill3, l3_tm_ill8, l1_tm_e_ill2, l2_tm_rst_dly, l1_tm_iq_ill3, l3_tm_ill11, l1_tm_e_ill8, l1_tm_iq_ill1, l3_tm_misc2, l2_tm_e_ill3, l2_tm_dig_21, l0_tm_ill11, l0_tm_cdr16, l3_tm_ana_byp_12, l3_tm_dig_8, l2_tm_ana_byp_15, l0_tm_dig_10, l2_tm_e_ill9, l3_tm_ill15, l1_tm_iq_ill2, l0_tm_dig_8, l1_tm_eq0, l0_tm_ana_byp_15, l0_tm_rst_dly, l1_tm_dig_21, l3_tm_pll_dig21, l0_tm_iq_ill2, l0_tm_iq_ill3, l3_tm_dig_10, l0_tm_iq_ill9, l0_tm_dig_21, l1_tm_iq_ill9, l3_tm_e_ill1, l3_tm_iq_ill8, l3_tm_dig_21, l0_tm_e_ill3, l1_tm_dig_8, l1_tm_ana_byp_12, l2_tm_dig_10, l2_tm_ill12, l0_tm_eq1, l3_tm_eq1, l1_tm_ill12, l3_tm_iq_ill1, l1_tm_rst_dly, l2_tm_iq_ill8, l2_tm_dig_8, l0_tm_e_ill8, l2_tm_e_ill2, l3_tm_iq_ill2, l2_tm_cdr16, l3_tm_cdr16, l0_tm_ill15, l3_tm_ill12, l1_tm_ill8, l0_tm_cdr5, l3_tm_e_ill2, l1_tm_iq_ill8, l3_tm_eq0, l1_tm_e_ill1, l0_tm_eq0, l0_tm_iq_ill8
spi	xspips_txwr_offset, xspips_imr_offset, xspips_sr_offset, xspips_idr_offset, xspips_ier_offset, xspips_rxd_offset, xspips_dr_offset, xspips_er_offset, xspips_sicr_offset, xspips_txd_offset, xspips_cr_offset
swdt	xwdtps_sr_offset, xwdtps_zmr_offset, xwdtps_restart_offset, xwdtps_ccr_offset
ttc	xttcps_cnt_cntrl_offset, xttcps_match_1_offset, xttcps_match_2_offset, xttcps_isr_offset, xttcps_clk_cntrl_offset, xttcps_ier_offset, xttcps_count_value_offset, xttcps_interval_val_offset, xttcps_match_0_offset
uart	xuartps_imr_offset, xuartps_fifo_offset, xuartps_sr_offset, xuartps_rxtout_offset, xuartps_isr_offset, xuartps_baudgen_offset, xuartps_cr_offset, xuartps_idr_offset, xuartps_ier_offset, xuartps_modemcr_offset, xuartps_mr_offset, xuartps_modemsr_offset, xuartps_rxwm_offset
vcu_slcr	vcu_axi_ctrl, dec_core_ctrl, enc_core_ctrl, dec_mcu_ctrl, enc_mcu_ctrl