control_n_match_c_n (PL390) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

control_n_match_c_n (PL390) Register Description

Register Namecontrol_n_match_c_n
Offset Address0x0000001050
Absolute Address 0x00F9001050 (RCPU_GIC)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionReturns the status of the match_c<n> tie-off signals for CPU
Interface <n>.

control_n_match_c_n (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
match_c31:0roRead-only0x0Returns the status of the match_c<n>[31:0] inputs for CPU
Interface <n>:
Bit [X] = 0 match_c<n>[x] is LOW
Bit [X] = 1 match_c<n>[x] is HIGH.
Where <n> is a number, from 0 to 7. that identifies one of
the CPU Interfaces.