Intrpt_en_REG (QSPI) Register Description
| Register Name | Intrpt_en_REG |
|---|---|
| Offset Address | 0x0000000008 |
| Absolute Address | 0x00FF0F0008 (QSPI) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Interrupt Enable |
Writing a 1 to this register clears the corresponding bits of the interrupt mask register. 0: no effect. 1: enable the interrupt (unmask = 1). Software Driver name: XQSPIPS_IER
Intrpt_en_REG (QSPI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:9 | roRead-only | 0x0 | reserved |
| TXFIFO_EMPTY | 8 | woWrite-only | 0x0 | TX FIFO Empty interrupt enable Software Driver name: XQSPIPS_IXR_TXEMPTY |
| Reserved | 7 | woWrite-only | 0x0 | reserved |
| TX_FIFO_underflow | 6 | woWrite-only | 0x0 | TX FIFO underflow enable Software Driver name: XQSPIPS_IXR_TXUF |
| RX_FIFO_full | 5 | woWrite-only | 0x0 | RX FIFO full enable Software Driver name: XQSPIPS_IXR_RXFULL |
| RX_FIFO_not_empty | 4 | woWrite-only | 0x0 | RX FIFO not empty enable Software Driver name: XQSPIPS_IXR_RXNEMPTY |
| TX_FIFO_full | 3 | woWrite-only | 0x0 | TX FIFO full enable Software Driver name: XQSPIPS_IXR_TXFULL |
| TX_FIFO_not_full | 2 | woWrite-only | 0x0 | TX FIFO not full enable Software Driver name: XQSPIPS_IXR_TXOW |
| Reserved | 1 | woWrite-only | 0x0 | reserved |
| RX_OVERFLOW | 0 | woWrite-only | 0x0 | Receive Overflow interrupt enable: Software Driver name: XQSPIPS_IXR_RXOVR |