Memory_Address_Register2 (NAND) Register Description
| Register Name | Memory_Address_Register2 |
|---|---|
| Offset Address | 0x0000000008 |
| Absolute Address | 0x00FF100008 (NAND) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Memory Address, reg 2. |
Note: Change values in this register only when controller is not communicating with the memory device.
Memory_Address_Register2 (NAND) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Chip_Select | 31:30 | rwNormal read/write | 0x0 | 00: Chip 0 will be selected. 01: Chip 1 will be selected. 10: reserved 11: reserved |
| nfc_bch_mode | 27:25 | rwNormal read/write | 0x0 | Program the BCH mode value: 001: 12-bit ECC 010: 8-bit ECC 011: 4-bit ECC 100: 24-bit ECC |
| Reserved | 23:8 | razRead as zero | 0x0 | reserved |
| Memory_Address | 7:0 | rwNormal read/write | 0x0 | Consider page size 4k, 4plane, 2Lun flash device bit[1:0] - Remaining block address bits. bit [2] - Lun select bit: 0: Lun 0 selected. 1: Lun 1 selected. bit [7:3] - Should be zero. |