INT_DIS_3 (GPIO) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

INT_DIS_3 (GPIO) Register Description

Register NameINT_DIS_3
Offset Address0x00000002D4
Absolute Address 0x00FF0A02D4 (GPIO)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionInterrupt Disable/Mask (GPIO Bank3, EMIO Bank0)

This register operates in exactly the same manner as INT_DIS_0, except that it reflects bank3, which corresponds to EMIO[31:0].

INT_DIS_3 (GPIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
INT_DISABLE_331:0woWrite-only0x0Interrupt disable
0: no change
1: set interrupt mask
Each bit configures the corresponding pin within the 32-bit bank