PS_CNTRL (PMU_GLOBAL) Register Description
| Register Name | PS_CNTRL |
|---|---|
| Offset Address | 0x0000000004 |
| Absolute Address | 0x00FFD80004 (PMU_GLOBAL) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | PL Program Initiation Control. |
The PL can be initialized by using the PS_PROG_B pin or the CSU.pcap_prog [pcfg_prog_b] register bit. These signals can be blocked using the [Prog_Gate] bit and unblocked using the [Prog_Enable] bit. The following bits are used together: [Prog_Enable] [Prog_Gate] 0 0 --> previous prog_gate control is maintained. 0 1 --> PROG_B is blocked (gated). 1 0 --> PROG_B allowed to propagate to PL reset circuit. 1 1 --> invalid.
PS_CNTRL (PMU_GLOBAL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:17 | roRead-only | 0x0 | reserved |
| Prog_Gate_Status | 16 | roRead-only | 0x0 | PROG gate status. 0: PROG_B allowed to reset PL 1: PROG_B blocked Read-only. |
| Reserved | 15:2 | roRead-only | 0x0 | reserved |
| Prog_Enable | 1 | rwNormal read/write | 0x0 | Enables PROG_B to propagate and reset the PL. This bit clears the PROG_GATE latch when set. PROG_ENABLE and PROG_GATE must never be set at the same time. |
| Prog_Gate | 0 | rwNormal read/write | 0x0 | Gates PROG_B preventing propagation and reset of the PL. This bit sets the PROG_GATE latch when set. PROG_ENABLE and PROG_GATE must never be set at the same time. |