SD_SDR50PRSET (IOU_SLCR) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

SD_SDR50PRSET (IOU_SLCR) Register Description

Register NameSD_SDR50PRSET
Offset Address0x000000033C
Absolute Address 0x00FF18033C (IOU_SLCR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00010001
DescriptionPreset Value for SDR50

SD_SDR50PRSET (IOU_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:29razRead as zero0x0Reserved. Writes are ignored, read data is zero.
SD1_SDR50PRESET28:16rwNormal read/write0x1SD1 Preset Value for SDR50
Reserved15:13razRead as zero0x0Reserved. Writes are ignored, read data is zero.
SD0_SDR50PRESET12:0rwNormal read/write0x1SD0 Preset Value for SDR50