control_n_interrupt_out_n (PL390) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

control_n_interrupt_out_n (PL390) Register Description

Register Namecontrol_n_interrupt_out_n
Offset Address0x0000001044
Absolute Address 0x00F9001044 (RCPU_GIC)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionEnables the integration test logic to modify the status of the
nfiq_c<n> and nirq_c<n> signals.

control_n_interrupt_out_n (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
set_nfiq_c 1rwNormal read/write0For CPU Interface <n>, reads return the status of
nfiq_c<n> and writes set the status of nfiq_c<n>.
set_nirq_c 0rwNormal read/write0For CPU Interface <n>, reads return the status of
nirq_c<n> and writes set the status of nirq_c<n>.