ATTR_106 (PCIE_ATTRIB) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ATTR_106 (PCIE_ATTRIB) Register Description

Register NameATTR_106
Offset Address0x00000001A8
Absolute Address 0x00FD4801A8 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00000248
DescriptionATTR_106

This register should only be written to during reset of the PCIe block

ATTR_106 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_vc0_total_credits_nph13:7rwNormal read/write0x4Number of credits that should be advertised for Non-Posted headers received on Virtual Channel 0.
The number of non posted data credits advertised by the block is equal to the number of non posted header credits. The sum of the posted, non posted, and completion header credits must be <= 80
attr_vc0_total_credits_ch 6:0rwNormal read/write0x48Number of credits that should be advertised for Completion headers received on Virtual Channel 0.
The sum of the posted, non posted, and completion header credits must be <= 80