MIDR (R5_DBG_1) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID: UG1087
Release Date: 2025-06-20
Revision: 1.11

MIDR (R5_DBG_1) Register Description

Register Name	MIDR
Offset Address	0x0000000D00
Absolute Address	0x00FEBF2D00 (CORESIGHT_R5_DBG_1)
Width	32
Type	roRead-only
Reset Value	0x411FC153
Description	Main ID Register

MIDR (R5_DBG_1) Register Bit-Field Summary

Field Name	Bits	Type	Reset Value	Description
Implementer	31:24	roRead-only	0x41	Implementer Indicates implementer. 0x41= Arm Limited.
Variant	23:20	roRead-only	0x1	Variant Identifies the major revision of the processor. This is the major revision number nin the rnpart of the rnpndescription of the product revision status.
Architectur	19:16	roRead-only	0xF	Architecture Indicates the architecture version. 0xF = see feature registers.
Primary_part_number	15:4	roRead-only	0xC15	Primary part number Indicates processor part number. 0xC15= Cortex-R5.
Revision	3:0	roRead-only	0x3	Revision Identifies the minor revision of the processor. This is the minor revision number nin the pnpart of the rnpndescription of the product revision status.