ATTR_20 (PCIE_ATTRIB) Register Description
| Register Name | ATTR_20 |
|---|---|
| Offset Address | 0x0000000050 |
| Absolute Address | 0x00FD480050 (PCIE_ATTRIB) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | ATTR_20 |
This register should only be written to during reset of the PCIe block
ATTR_20 (PCIE_ATTRIB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr_expansion_rom | 15:0 | rwNormal read/write | 0x0 | Specifies mask/settings for the Expansion ROM Base Address Register (BAR). If the BAR is not to be implemented, set to 32h00000000. Bits are defined as follows: [0] = Expansion ROM implemented (set to 1 to implement ROM) [10:1] = Reserved (set to 0) [31:11] = Mask for writable bits of BAR; set uppermost 31:(2^n) bits to 1, where 2^n=rom aperture size in bytes. |