L2_TM_DIG_10 (SERDES) Register Description
| Register Name | L2_TM_DIG_10 |
|---|---|
| Offset Address | 0x000000907C |
| Absolute Address | 0x00FD40907C (SERDES) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000001 |
| Description | Register value is generated by Vivado PCW. |
L2_TM_DIG_10 (SERDES) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| TM_DIG_10_31_8_rsvd | 31:8 | roRead-only | 0x0 | Value generated by PCW. |
| Reserved | 7:4 | roRead-only | 0x0 | Value generated by PCW. |
| cdr_bit_lock_time | 3:0 | rwNormal read/write | 0x1 | Value generated by PCW. |