enable_periph_id_8 (PL390) Register Description
| Register Name | enable_periph_id_8 |
|---|---|
| Offset Address | 0x0000000FC0 |
| Absolute Address | 0x00F9000FC0 (RCPU_GIC) |
| Width | 8 |
| Type | roRead-only |
| Reset Value | 0x00000004 |
| Description | The periph_id_[8:0] Registers provide information about the configuration of the peripheral. Note some fields span across adjacent registers. |
enable_periph_id_8 (PL390) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| identifier | 7 | roRead-only | 0x0 | Identifies the AMBA interface that this register belongs to. |
| if_type | 6:5 | roRead-only | 0x0 | Identifies the AMBA protocol that the GIC supports: b00 = AXI, b01 = AHB-Lite, b10-b11 = reserved. |
| cpu_if | 4:2 | roRead-only | 0x1 | Identifies the number of CPU Interfaces that the GIC contains: b000 = 1, b001 = 2, b010 = 3, b011 = 4, b100 = 5, b101 = 6, b110 = 7, b111 = 8. |
| fiq_legacy | 1 | roRead-only | 0x0 | Identifies if the GIC provides a legacy FIQ input signal for each CPU Interface. |
| irq_legacy | 0 | roRead-only | 0x0 | Identifies if the GIC provides a legacy IRQ input signal for each CPU Interface. |