control_n_cpu_if_ident (PL390) Register Description
| Register Name | control_n_cpu_if_ident |
|---|---|
| Offset Address | 0x00000010FC |
| Absolute Address | 0x00F90010FC (RCPU_GIC) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x3901043B |
| Description | Returns the status of the enable_c<n> tie-off signals for CPU Interface <n>. |
control_n_cpu_if_ident (PL390) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| part_num | 31:20 | roRead-only | 0x390 | Identifies the peripheral. The part number of the GIC is 0x390. |
| arch_num | 19:16 | roRead-only | 0x1 | Identifies the version of the Arm Generic Interrupt Controller Architecture Specification that the GIC implements. For version 1.0, this field reads back as 0x1. |
| rev_num | 15:12 | roRead-only | 0x0 | Returns the revision number of the GIC. For revision r0p0, these bits read back as 0x0. |
| implementor | 11:0 | roRead-only | 0x43B | Returns the JEP106 code of the company that implemented the Distributor RTL, that is, Arm. It uses the following bit format: [11:8] = 0x4, that is, the JEP106 continuation code for Arm, [7] = 0, [6:0] = b0111011, that is, the JEP106 code [6:0] for Arm. |