CTRL_REG_SD (IOU_SLCR) Register Description
| Register Name | CTRL_REG_SD |
|---|---|
| Offset Address | 0x0000000310 |
| Absolute Address | 0x00FF180310 (IOU_SLCR) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | SD eMMC selection |
CTRL_REG_SD (IOU_SLCR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:16 | razRead as zero | 0x0 | Reserved. Writes are ignored, read data is zero. |
| SD1_EMMC_SEL | 15 | rwNormal read/write | 0x0 | SD or eMMC selection on SDIO1 0: SD enabled 1: eMMC enabled |
| Reserved | 14:1 | rwNormal read/write | 0x0 | Reserved. Writes are ignored, read data is zero. |
| SD0_EMMC_SEL | 0 | rwNormal read/write | 0x0 | SD or eMMC selection on SDIO0 0: SD enabled 1: eMMC enabled |