PP1_WB2_GLOBAL_TEST_REF_VALUE (GPU) Register Description
| Register Name | PP1_WB2_GLOBAL_TEST_REF_VALUE |
|---|---|
| Offset Address | 0x000000A328 |
| Absolute Address | 0x00FD4BA328 (GPU) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | WB2 Global Test Reference Value Register |
PP1_WB2_GLOBAL_TEST_REF_VALUE (GPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:16 | rwNormal read/write | 0x0 | Reserved, write as zero, read undefined. |
| _ | 15:0 | rwNormal read/write | 0x0 | WB2_SOURCE_SELECT FP_TILEBUF_ENABLE Value interpretation 1 - Z/Stencil Unused Stencil 8bit 2 - ARGB color 0 Alpha 8bit 3 - ARGB color 1 Alpha FP16 |