REQ_ISO_TRIG (PMU_GLOBAL) Register Description
| Register Name | REQ_ISO_TRIG |
|---|---|
| Offset Address | 0x0000000320 |
| Absolute Address | 0x00FFD80320 (PMU_GLOBAL) |
| Width | 32 |
| Type | woWrite-only |
| Reset Value | 0x00000000 |
| Description | Isolation Request; Interrupt Trigger. |
Trigger an isolation request. 0: no effect. 1: trigger the request. Write-only. There are 3 isolation boundaries: FPD-PL signals. LPD-PL signals (except PCAP). PCAP-PL signals. (include PCAP). The REQ_ISO_STATUS register physically isolates the device sections. Physical isolation abruptly disconnects wires between the sections. The AIB units logically isolate AXI components. The AIB blocks new AXI transactions, but allows active and pending transactions to complete. Software must quiescent the system using the AIB units and other chip features before requesting physical Isolation.
REQ_ISO_TRIG (PMU_GLOBAL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| FP_Locked | 4 | woWrite-only | 0x0 | Isolate all signals between the FPD and LPD with the exception of the clock and reset signals. The PL Interface remains active. Note: If the FPD voltage node is not powered up when the PS_POR_B reset pin is released, then the FPD node is permanently locked out and this bit is set. To re-enable the FPD, a PS_POR_B reset is required with valid power on VCC_PSINTFP. |
| PL_NonPCAP | 2 | woWrite-only | 0x0 | Isolate PL signals between PL and PS (LPD and FPD) excluding the PCAP in LPD (to allow PS LPD access to PCAP). |
| PL | 1 | woWrite-only | 0x0 | Isolate PL signals between PL and PS (LPD and FPD) including PCAP in LPD. |
| FP | 0 | woWrite-only | 0x0 | Isolate all FPD signals between FPD and LPD and between FPD and PLPD. |