SMMU_CB11_IPAFAR_high (SMMU500) Register Description
| Register Name | SMMU_CB11_IPAFAR_high |
|---|---|
| Offset Address | 0x000001B074 |
| Absolute Address | 0x00FD81B074 (SMMU_GPV) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | The stage 1 IPA Fault Address Upper bits [63:32] Register |
SMMU_CB11_IPAFAR_high (SMMU500) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| bits | 15:0 | rwNormal read/write | 0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |