reg_presetvalue2 (SDIO) Register Description
| Register Name | reg_presetvalue2 |
|---|---|
| Offset Address | 0x0000000064 |
| Absolute Address |
0x00FF160064 (SD0) 0x00FF170064 (SD1) |
| Width | 16 |
| Type | roRead-only |
| Reset Value | 0x00000002 |
| Description | High-Speed Clock and I/O Drive Preset Values. Read clock select values and I/O drive. |
Read the SDCLK Frequency Select Value, Clock Generator Select Value, Driver Strength Select Value for High Speed
reg_presetvalue2 (SDIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| DriverStrengthSelectValue | 15:14 | roRead-only | 0x0 | Driver Strength is supported by 1.8V signaling bus speed modes. This field is meaningless for 3.3V signaling. 00 Driver Type B is Selected 01 Driver Type A is Selected 10 Driver Type C is Selected 11 Driver Type D is Selected |
| ClockGeneratorSelectValue | 10 | roRead-only | 0x0 | This bit is effective when Host Controller supports programmable clock 0 Host Controller Ver2.00 Compatible Clock Generator 1 Programmable Clock Generator |
| SDCLKFrequencySelectValue | 9:0 | roRead-only | 0x2 | 10-bit preset value to set SDCLK Frequency Select in the Clock Control Register is described by a host system. |