INT_POLARITY_0 (GPIO) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

INT_POLARITY_0 (GPIO) Register Description

Register NameINT_POLARITY_0
Offset Address0x0000000220
Absolute Address 0x00FF0A0220 (GPIO)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionInterrupt Polarity (GPIO Bank0, MIO)

This register controls whether the interrupt is active-low or active high (or falling-edge sensitive or rising-edge sensitive). This register controls bank0, which corresponds to MIO[25:0].

INT_POLARITY_0 (GPIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:26razRead as zero0x0Not used, read back as zero
INT_POL_025:0rwNormal read/write0x0Interrupt polarity
0: active low or falling edge
1: active high or rising edge
Each bit configures the corresponding pin within the 26-bit bank