INT_MASK_3 (GPIO) Register Description
| Register Name | INT_MASK_3 |
|---|---|
| Offset Address | 0x00000002CC |
| Absolute Address | 0x00FF0A02CC (GPIO) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0xFFFFFFFF |
| Description | Interrupt Mask Status (GPIO Bank3, EMIO Bank0) |
This register operates in exactly the same manner as INT_MASK_0, except that it reflects bank3, which corresponds to EMIO[31:0].
INT_MASK_3 (GPIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| INT_MASK_3 | 31:0 | roRead-only | 0xFFFFFFFF | Interrupt mask 0: interrupt source enabled 1: interrupt source masked Each bit reports the status for the corresponding pin within the 32-bit bank |