FI_D (PMU_LMB_BRAM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

FI_D (PMU_LMB_BRAM) Register Description

Register NameFI_D
Offset Address0x0000000300
Absolute Address 0x00FFD50300 (PMU_LMB_RAM)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionFault Inject Data

This register is used to inject errors in data written to the block RAM and can be used to test the error correction and error signalling. The bits set in the register toggle the corresponding data bits of the subsequent data written to the block RAM without affecting the ECC bits written. After the fault has been injected, the Fault Injection Data Register is cleared automatically. IMPORTANT: Injecting faults should be performed in a critical region in software; that is, writing to this register and the subsequent write to the LMB BRAM must not be interrupted.

FI_D (PMU_LMB_BRAM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
fi_d31:0woWrite-only0x0Bit positions set to 1 toggle the corresponding bits of the next data word written to the LMB BRAM. The register is automatically cleared after the fault has been injected.