gpu_intfpd_ib_ar_b (FPD_GPV) Register Description
| Register Name | gpu_intfpd_ib_ar_b |
|---|---|
| Offset Address | 0x000004D128 |
| Absolute Address | 0x00FD74D128 (FPD_GPV) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | AR channel burstiness allowance |
gpu_intfpd_ib_ar_b (FPD_GPV) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ar_b | 15:0 | rwNormal read/write | 0x0 | channel burstiness (integer number of transfers) |