TRAN_EGRESS_DST_BASE_LO (AXIPCIE_EGRESS) Register Description
| Register Name | TRAN_EGRESS_DST_BASE_LO |
|---|---|
| Offset Address | 0x0000000018 |
| Absolute Address |
0x00FD0E0C18 (AXIPCIE_EGRESS0) 0x00FD0E0C38 (AXIPCIE_EGRESS1) 0x00FD0E0C58 (AXIPCIE_EGRESS2) 0x00FD0E0C78 (AXIPCIE_EGRESS3) 0x00FD0E0C98 (AXIPCIE_EGRESS4) 0x00FD0E0CB8 (AXIPCIE_EGRESS5) 0x00FD0E0CD8 (AXIPCIE_EGRESS6) 0x00FD0E0CF8 (AXIPCIE_EGRESS7) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Egress AXI Translation - Destination Address Low |
TRAN_EGRESS_DST_BASE_LO (AXIPCIE_EGRESS) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| egress_dst_base_lo | 31:12 | rwNormal read/write | 0x0 | egress_dst_base[31:12]. |
| Reserved | 11:0 | roRead-only | 0x0 |