E_MSXT_CAPABILITIES (AXIPCIE_MAIN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

E_MSXT_CAPABILITIES (AXIPCIE_MAIN) Register Description

Register NameE_MSXT_CAPABILITIES
Offset Address0x0000000240
Absolute Address 0x00FD0E0240 (AXIPCIE_MAIN)
Width32
TyperoRead-only
Reset Value0x030C0001
DescriptionEgress MSI-X Table Translation - Capabilities

E_MSXT_CAPABILITIES (AXIPCIE_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
msxt_size_max31:24roRead-only0x3msxt_size supports values between 0 and msxt_size_max.
Maximum translation size is 2^(msxt_size_offset+msxt_size_max).
msxt_size_offset23:16roRead-only0xCMinimum translation size is 2^(msxt_size_offset).
Reserved15:1roRead-only0x0
msxt_present 0roRead-only0x1Translation presence indicator.