TX_thres_REG (QSPI) Register Description
| Register Name | TX_thres_REG |
|---|---|
| Offset Address | 0x0000000028 |
| Absolute Address | 0x00FF0F0028 (QSPI) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000001 |
| Description | TX FIFO Threshold |
Software Driver name: XQSPIPS_TXWR
TX_thres_REG (QSPI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Threshold_of_TX_FIFO | 31:0 | rwNormal read/write | 0x1 | Defines the level at which the TX FIFO not full interrupt is generated Note: Change this value only when controller is not communicating with the memory device. |