| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:15 | roRead-only | 0x0 | |
| cfg_ram_dma_sgl_dst_dis_err | 14 | rwNormal read/write | 0x0 | DMA Channel Destination SGL Buffer (DMA Only) |
| cfg_ram_dma_sgl_src_dis_err | 13 | rwNormal read/write | 0x0 | DMA Channel Source SGL Buffer (DMA Only) |
| cfg_ram_dma_ch_reg_dis_err | 12 | rwNormal read/write | 0x0 | DMA Channel Registers (DMA Only) |
| cfg_ram_dma_msix_tab_dis_err | 11 | rwNormal read/write | 0x0 | MSI-X Table |
| Reserved | 10:9 | roRead-only | 0x0 | |
| cfg_ram_dma_axi_s_w_dis_err | 8 | rwNormal read/write | 0x0 | AXI Slae Write Data Buffer |
| Reserved | 7 | roRead-only | 0x0 | |
| cfg_ram_dma_axi_m_r_dis_err | 6 | rwNormal read/write | 0x0 | AXI Master Read Reorder Queue |
| cfg_ram_dma_pcie_s_cd_dis_err | 5 | rwNormal read/write | 0x0 | PCIe Slave Read Completion Data Buffer |
| cfg_ram_dma_pcie_s_ra_dis_err | 4 | rwNormal read/write | 0x0 | PCIe Slave Read Address Buffer |
| cfg_ram_dma_pcie_s_w_dis_err | 3 | rwNormal read/write | 0x0 | PCIe Slave Write Data Buffer |
| cfg_ram_dma_pcie_s_wa_dis_err | 2 | rwNormal read/write | 0x0 | PCIe Slave Write Address Buffer |
| cfg_ram_dma_pcie_tx_w_dis_err | 1 | rwNormal read/write | 0x0 | PCIe Master TLP Buffer |
| cfg_ram_dma_pcie_m_r_dis_err | 0 | rwNormal read/write | 0x0 | PCIe Master Read Reorder Queue |