zFx_MSIX_CAP_TABLE_SIZE_3 (CPM4_PCIE0_ATTR) Register Description
| Register Name | zFx_MSIX_CAP_TABLE_SIZE_3 |
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| Relative Address | 0x00000006CC |
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| Absolute Address |
0x00FCA506CC (CPM4_PCIE0_ATTR)
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| Width | 32 |
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| Type | rwNormal read/write |
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| Reset Value | 0x00000000 |
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| Description | MSI-X Table Size. This value is transferred to the MSI-X Message Control[10:0] field. Set to 0 if MSI-X is not enabled. Note that the core does not implement the table; that must be implemented in user logic. |
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This register should only be written to during reset of the PCIe block
zFx_MSIX_CAP_TABLE_SIZE_3 (CPM4_PCIE0_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| attr | 10:0 | rwNormal read/write | 0x0 | MSI-X Table Size. This value is transferred to the MSI-X Message Control[10:0] field. Set to 0 if MSI-X is not enabled. Note that the core does not implement the table; that must be implemented in user logic. |