agent_iccc0_llc_operation_control (CPM5_L2_CFG) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

agent_iccc0_llc_operation_control (CPM5_L2_CFG) Register Description

Register Nameagent_iccc0_llc_operation_control
Relative Address0x00000061E0
Absolute Address 0x00FCC061E0 (CPM5_L20_CSR)
0x00FCC861E0 (CPM5_L21_CSR)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000001
DescriptionThis register is used to change the behavior of the LLC in various ways, as listed in the description for each bit.

This register is used to change the behavior of the LLC in various ways, as listed in the description for each bit. The default values are listed in the bit field description.

agent_iccc0_llc_operation_control (CPM5_L2_CFG) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
UNSD_63_263:2roRead-only0x0
FAS 1rwNormal read/write0x01b1: Force address serialization--only 1 operation can issue to memory for an address.
1b0: Do not force address serialization. Default value.
LRU 0rwNormal read/write0x11b1: Enable LRU updates on a cache hit.
1b0: Disable LRU updates on a cache hit.