I2C_IMR (PS_I2C) Register Description
Register Name | I2C_IMR |
---|---|
Relative Address | 0x0000000020 |
Absolute Address |
0x00FF020020 (LPD_I2C0) 0x00FF030020 (LPD_I2C1) |
Width | 16 |
Type | roRead-only |
Reset Value | 0x000002FF |
Description | Interrupt Mask |
Interrupt mask bit states: 0: unmask (enable interrupt) 1: set mask (disable interrupt, reset default) Note: Read-only. Set the IMR bits by writing ones to the IDR register. Clear the IMR bits by writing ones to the IER register. Note: These interrupts are described with the ISR status register and in the TRM. Alternate register name: Intrpt_mask_reg0
I2C_IMR (PS_I2C) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 15:10 | roRead-only | 0x0 | reserved |
ARB_LOST | 9 | roRead-only | 0x1 | Arbitration Lost |
Reserved | 8 | roRead-only | 0x0 | reserved |
RX_UNF | 7 | roRead-only | 0x1 | FIFO receive underflow |
TX_OVF | 6 | roRead-only | 0x1 | FIFO transmit overflow |
RX_OVF | 5 | roRead-only | 0x1 | Receive overflow |
SLV_RDY | 4 | roRead-only | 0x1 | Monitored slave ready |
TO | 3 | roRead-only | 0x1 | Transfer time out |
NACK | 2 | roRead-only | 0x1 | Transfer not acknowledged |
DATA | 1 | roRead-only | 0x1 | More data |
COMP | 0 | roRead-only | 0x1 | Transfer complete |