evnt_sel_3 (FPD_CCI_CORE) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

evnt_sel_3 (FPD_CCI_CORE) Register Description

Register Nameevnt_sel_3
Relative Address0x0000040000
Absolute Address 0x00FD040000 (FPD_CCI_CORE)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
Descriptionevnt_sel_3

evnt_sel_3 (FPD_CCI_CORE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:9roRead-only0reserved
mon_int_3 8:5rwNormal read/write0x0Event code that defines the interface to monitor.
mon_evt_3 4:0rwNormal read/write0x0Event code that defines the event to monitor.